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RE: Regarding generation of torus architectures [ Reply ]
By: Francois PELLEGRINI on 2011-03-09 08:19
[forum:106564]
> The SCOTCH documentation talks about support for automatic
> generation of target architectures like meshes, torus etc.
> However, the command line program like amk_m2 provide mesh
> generation only. Is there any such program which automatically
> generate target 3D torus architectures alongwith its recursive
> decomposition?

The amk_m* programs are just here as examples for using decomposition-defined, but indeed they should not be used for such regular topologies, for which algorithmically-defined architectures are much more efficient.

For instance, to create a 10x5x3 3D torus, you just have to type :

% echo "torus3D 10 5 3" > /tmp/torus.tgt

and use this file as a target architecture file. Routines now exist in the libScotch to use these architectures without having to create a file on your system.

> I have another question with reference to the example in
> Figure 7 of the user manual for Scotch 4.0. In this example,
> a target decomposition file for UB(2,3) has been shown. But,
> by looking at the contents of files, I cannot make out as to
> which processor is assigned what label (0 to 7) in the topology.
> The figure tells that once you have assigned labels to nodes,
> then the recursive partitioning can help you assign terminal
> ids which are shown in the figure. Therefore, my question is
> this. From these target architecture files, we do not know
> the label assignment. But, when we map a source file onto
> this architecture, then we will have a mapping from each
> vertex of the source node onto some label in this target
> architecture. How will we then figure out how the mapping
> looks like since we do not know the label assignment in
> target graph. We also need the label assignment in the
> target graph to compute the cut metric when a source graph
> has been mapped to it.

For decomposition-defined architectures, indeed, the distance map between any pair of vertices is inferred from the target graph topology: Since users provided the graph, it is expected that they can extract the information themselves, including what the terminal numbers they placed on the vertices mean to them. These "terminal numbers" are just numbers from 0 to (p-1), if you like.

For algorithmically-defined architectures, these numbers are computed row-major. For instance, for a 3D torus of dimension xd*yd*zd, vertex (x,y,z) has terminal number (z * yd + y) * xd + x, that is, z * (yd * xd) + y * xd + x.

Regarding generation of torus architectures [ Reply ]
By: Gaurav Khanna on 2007-01-26 17:15
[forum:2661]
Hello all,

The SCOTCH documentation talks about support for automatic generation of target architectures like meshes, torus etc. However, the command line program like amk_m2 provide mesh generation only. Is there any such program which automatically generates target 3D torus architectures alongwith its recursive decomposition?

I have another question with reference to the example in Figure 7 of the user manual for Scotch 4.0. In this example, a target decomposition file for UB(2,3) has been shown. But, by looking at the contents of files, I cannot make out as to which processor is assigned what label (0 to 7) in the topology. The figure tells that once you have assigned labels to nodes, then the recursive partitioning can help you assign terminal ids which are shown in the figure. Therefore, my question is this. From these target architecture files, we do not know the label assignment. But, when we map a source file onto this architecture, then we will have a mapping from each vertex of the source node onto some label in this target architecture. How will we then figure out how the mapping looks like since we do not know the label assignment in target graph. We also need the label assignment in the target graph to compute the cut metric when a source graph has been mapped to it.

I hope the question is clear.

Regards
Gaurav

Regards
Gaurav